As is known in the art, oversampling has become popular in recent years for converting signals between analog and digital formats. Oversampling avoids the difficulties encountered with conventional analog-to-digital and digital-to-analog (ADC, DAC) conversion techniques employing relatively low sampling rates, typically the Nyquist rate of the signal. Conventional analog-to-digital and digital-to-analog techniques require very precise analog components in the filter and conversion circuits because of their vulnerability to noise and interference.
Conversely, oversampling ADC or DAC's are able to use relatively simple high-tolerance components to achieve high resolution. By sampling at much higher frequencies than the Nyquist rate of the signal the difficulties of the conventional analog-to-digital and digital-to-analog techniques are avoided. Oversampling ADC or DAC's permit simple and relatively high-tolerance analog components to achieve high resolution. However, fast and complex digital signal processing techniques are required to implement the filtering of the aliasing frequencies in ADC's.
FIG. 1 is a schematic diagram of a delta-sigma modulated ADC of the related art. An analog input signal INa is applied to an amplifier A1. The output of the amplifier A1 is applied to one input of the summation circuit S1. The output of the summation circuit is a quantization error QERR that is applied to the Anti-Aliasing Filter AAF. The Anti-Aliasing Filter AAF is a composed of the cascaded integrators ∫1, ∫2, ∫3, and the buffers A1, A2, and A3. The Anti-Aliasing Filter AAF only processes the quantization noise of the analog-to-digital converter. The outputs of the buffers A1, A2, and A3 are applied to the summation circuit S2 to be additively combined with the input signal INa. The output of the summation circuit S2 is applied to the input of the flash quantizer FQ. The flash quantizer FQ is formed of multiple comparators COMP1, COMP2, . . . COMPn to generate the digital code. In this structure, the output digital code OUTB is a unary thermometer code that must be re-coded to a binary digital code in external circuitry. The output digital code OUTB is applied to the digital-to-analog converter DAC that converts the output digital code OUTB to an analog signal applied to the summation circuit S1. The output signal of the digital-to-analog converter DAC is subtractively combined to form a differential signal for determining the quantization error signal QERR.
The noise shaping of the Anti-Aliasing Filter AAF determines the spectrum of the quantization noise. The more severe the noise shaping that is chosen, the more pronounced the warping of the noise spectrum. This attenuates the quantization noise in the intended frequency band of interest, at the expense of increased higher frequency noise. A low pass decimation filter removes the high frequency noise, leaving only the filtered and decimated bandwidth of interest. However, the trade off is that the more high frequency the delta-sigma modulated ADC output OUTB contains, the less stable the input range becomes. Ideally the ADC would have a large stable input range in order to maximize signal to noise ratio (SNR), with a flat Total Harmonic Distortion and Noise (THDN) response up to or approaching that point. Once a delta-sigma modulated ADC's stable input range is exceeded, the response of the delta-sigma modulated ADC becomes badly degraded and can be unpredictable, worst case becoming permanently locked in oscillation even when a large input is removed.
Circuits and methods within the delta-sigma modulated ADC are needed to balance the trade off between maximizing the stable input voltage range with the choice of severity of noise shaping.